makefile - How to manage C header file dependencies?

Question

I've a lot of C files, some have a header (.h), some files not.

Here's my makefile :

.SUFFIXES: 

SRC := $(wildard ./src/*.c)
OBJ := $(SRC:%.c=%.o)

all: $(OBJ)

%.o: %.c
    $(MyNotGCCCompiler) "@../$(*F).cmd"

It works fine except that if I change a header file, the target isn't recompiled because not included in the dependencies.

How can I manage this case?

Thanks

Answer 1

The standard approach is to generate header dependencies automatically while compiling.

For the first compilation no dependencies are necessary since every source file must be compiled. Subsequent recompilations load dependencies generated by the previous compilation to determine what needs to be recompiled.

Your $(MyNotGCCCompiler) is likely to have a command line option to generate a dependencies file.

When using gcc it works like this:

.SUFFIXES: 

SRC := $(wildard ./src/*.c)
OBJ := $(SRC:%.c=%.o)
DEP := $(OBJ:%.o=%.d)

all: $(OBJ)

# when compiling produce a .d file as well 
%.o: %.c
    gcc -c -o $@ $(CPPFLAGS) $(CFLAGS) -MD -MP -MF ${@:.o=.d} $<

# don't fail on missing .d files
# there won't be any on the first run
-include $(DEP)